Patent №
US 4,599,710
Granted
1986-07-08
Filed 1984
Owner
U.S. PHILLIPS CORPORATION A CORP OF DE
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
06605958
In a series-parallel-series memory circuit (3) which requires a write clock signal (at 19), a transfer clock signal (at 25) and a read clock signal (at 31), it is sufficient, because a clock signal processing circuit (23) is provided, to apply only two clock signals (to 33 and 35). Using a gate circuit (41), it is possible to obtain from one clock signal (applied to 35) additional information, which is provided by means of pulse duration variation, for adapting the time delay of the memory circuit (FIG. 1).
AI classification
Ownership
U.S. PHILLIPS CORPORATION A CORP OF DE
assignment · 43000675
Assignors
PELROM, MERCELLINUS J. M., RAVEN, JOHANNES G., SLOTBOOM, JAN W., HARWIG, HENDRIK A., ANNEGARN, MARCELLINUS J. J. C.
On an employer assignment, the assignors are typically the inventors.