Patent №
US 4,622,632
Granted
1986-11-11
Filed 1982
Owner
BOARD OF REGENTS, UNIVERSITY OF WASHINGTON
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
06409348
A pyramidal data processing system comprising a plurality of levels of processor arrays, the number of processors in an array increases in number from a level of lowest resolution to a level of highest resolution. Each processor in an array is coupled for data transfer to a neighborhood of processors including laterally and diagnoally adjacent processors in the same level, a processor in the level of next lowest resolution, and processors in the level of next greatest resolution. A memory is associated with each processor to store value of data elements. A controller and control memory generate control signals to perform in synchrony data transformations on selected data elements associated with each neighborhood of processors.
AI classification
Ownership
BOARD OF REGENTS, UNIVERSITY OF WASHINGTON
assignment · 40360564
Assignors
TANIMOTO, STEVEN L., PFEIFFER, JOSEPH J. JR
On an employer assignment, the assignors are typically the inventors.