INTEGRATED CIRCUIT HAVING LITHOGRAPHICAL CELL ARRAY INTERCONNECTIONS

A massively parallel data processing system consisting of an array of closely spaced cells where each cell has direct output means as well as means for processing, memory and input. The data processing system according to the present invention overcomes the von Neumann bottleneck of uniprocessor architectures, the I/O and memory bottlenecks that plague parallel processors, and the input bandwidth bottleneck of high-resolution displays.