COMPUTER ASSISTED FAULT ISOLATION IN CIRCUIT BOARD TESTING

Patent №

US 4,709,366

Granted

1987-11-24

Filed 1985

Owner

JOHN FLUKE MFG. CO., INC., 6920 SEAWAY BOULEVARD, EVERETT, WASHINGTON, 98206, A CORP OF WASHINGTON

Lab

AI components

1

planning

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

06761027

Circuit faults in an electronic system are isolated by a programmed computer that guides a technician node-by-node on a unit under test (UUT), such as a circuit board, to the source of a failure. Stimulus pattern signals are applied to the circuit, and responses at the circuit nodes are made by a measurement probe under the hand of the technician. As each node is probed, a stimulus pattern signal tailored for testing that node is applied to the UUT. The measured response is compared to a predetermined response corresponding to an operational UUT to generate a failure accusation or recommend the next node to be probed. The computer is programmed to expedite the search for the source of the failure by displaying to the technician clues which define the circuit nodes most apt to be defective as a result of preliminary functional testing of the UUT. The computer is further programmed to have a form of "intuition" whereby the particular nodes recommended for probing are determined in part by prior testing of the same type of UUT.

PlanningG06F 11/261G06F 11/2257Y10S 706/916

AI classification

Planning0.97
AI hardware0.10
Knowledge representation0.10
Machine learning0.03
Evolutionary computation0.03
Natural language0.02
Speech0.00
Vision0.00

Ownership

JOHN FLUKE MFG. CO., INC., 6920 SEAWAY BOULEVARD, EVERETT, WASHINGTON, 98206, A CORP OF WASHINGTON

assignment · 44380602

Assignors

SCOTT, MARSHALL H., POLSTRA, JOHN D.

On an employer assignment, the assignors are typically the inventors.

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