Patent №
US 4,931,997
Granted
1990-06-05
Filed 1988
Owner
HITACHI, LTD.
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
07159193
A volatile storage circuit for latching data is disposed outside a non-volatile memory array. Before a bulk erase of the memory array, some of the data items contained therein are transferred to and held by the storage circuit. The data items thus saved are rewritten to the non-volatile memory array after the bulk erase, or alternatively, on the basis of control data items transferred to the storage circuit, only regions designated by these data items are subjected to the bulk erase. Thus, in case of a bulk erase of an EEPROM, some of the stored data items can be preserved, so as to prevent illicit use of and maintain the integrity of the preserved data. Also the testing time of the data rewritten to the memory array is reduced because of the elimination of the need to test the memory area containing the preserved data in that only the integrity of the memory area containing data sourced externally need be tested.
AI classification
Ownership
HITACHI, LTD.
assignment · 49080209
Assignors
MITSUISHI, NAOKI, MATSUBARA, KIYOSHI, TAKAMORI, YOH, OZAWA, YOSHIYUKI
On an employer assignment, the assignors are typically the inventors.