TESTABLE IMPLEMENTATIONS OF FINITE STATE MACHINES AND METHODS FOR PRODUCING THEM

Patent №

US 5,228,040

Granted

1993-07-13

Filed 1990

Owner

AMERICAN TELEPHONE AND TELEGRAPH COMPANY

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

07491417

A testable implementation of a given finite state machine is produced by defining a test finite state machine which can set and read the same number of flip flops as are required for the memory elements of the given finite machine and then merging the test finite state machine with the given finite state machine to produce a testable finite state machine in which the test finite state machine and the given finite state machine share the flip flops. The testable implementation is then produced from the testable finite state machine. Since the test finite state machine and the given finite state machine share the flip flops of the testable implementation, the test finite state machine can be used to test the given finite state machine by setting and reading the given finite state machine's flip flops. Techniques are further disclosed for defining the test finite state machine and merging the test finite state machine with the given finite state machine.

AI classification

AI hardware0.98
Knowledge representation0.03
Machine learning0.02
Natural language0.01
Planning0.00
Evolutionary computation0.00
Vision0.00
Speech0.00

Ownership

AMERICAN TELEPHONE AND TELEGRAPH COMPANY

assignment · 52970297

Assignors

AGRAWAL, VISHWANI DEO, CHENG, KWANG-TING

On an employer assignment, the assignors are typically the inventors.

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