CACHE COHERENCY METHOD AND APPARATUS FOR A MULTIPLE PATH INTER- CONNECTION NETWORK

Patent №

US 5,249,283

Granted

1993-09-28

Filed 1990

Owner

NCR CORPORATION, A CORP. OF MD

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

07633732

A method and apparatus for providing coherency for cache data in a multiple processor system with the processors distributed among multiple independent data paths. The apparatus includes a set of cache monitors, sometimes called snoopers, associated with each cache memory. There are the same number of monitors as there are independent data paths. Thus, each cache stores cache tags that correspond to its currently encached data into each of the monitors of the set associated therewith. Thus, each cache has an monitor associated therewith which monitors each of the multiple paths for an operation at an address that corresponds to data stored in its cache. If such an access is detected by one of the set of monitors, the monitor notifies its cache so that appropriate action will be taken to ensure cache data coherency.

AI hardwareG06F 12/0813G06F 12/0831

AI classification

AI hardware0.62
Vision0.02
Machine learning0.00
Natural language0.00
Evolutionary computation0.00
Planning0.00
Speech0.00
Knowledge representation0.00

Ownership

NCR CORPORATION, A CORP. OF MD

assignment · 55600019

Assignors

BOLAND, VERNON K.

On an employer assignment, the assignors are typically the inventors.

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