MICROCOMPUTER WITH HIGH DENSITY RAM IN SEPARATE ISOLATION WELL ON SINGLE CHIP.

Patent №

US 5,452,467

Granted

1995-09-19

Filed 1993

Owner

INMOS LIMITED

+1 more

Lab

—

AI components

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

08066462

A microcomputer includes an on-chip processor with at least 1K bytes of high density RAM on-chip together with isolation regions to protect the RAM from noise from transistors on-chip operating independently of the RAM.

AI hardwareG06F 9/4881G06F 9/30112G06F 9/3016G06F 9/30185G06F 9/54G06F 15/786G06F 15/8023G11C 29/70+1 more

Google Patents

AI classification

AI hardware0.94

Evolutionary computation0.01

Machine learning0.01

Natural language0.00

Vision0.00

Speech0.00

Planning0.00

Knowledge representation0.00

Ownership

INMOS LIMITED

assignment · 66560555

ST MICROELECTRONICS, INC., A DELAWARE CORPORATION

assignment · 111900101

Assignors

MAY, MICHAEL D., EDWARDS, JONATHAN, WALLER, DAVID L.

On an employer assignment, the assignors are typically the inventors.

From the same owner

MICROCOMPUTER WITH HIGH DENSITY RAM IN SEPARATE ISOLATION WELL ON SINGLE CHIPUS 5,506,437 · 1996 MICROCOMPUTER DWITH HIGH DENSITY RAM IN SEPARATE ISOLATION WELL ON SINGLE CHIPUS 5,491,359 · 1996 MEMORY DEVICE THAT FUNCTIONS AS A CONTENT ADDRESSABLE MEMORY OR A RANDOM ACCESS MEMORYUS 5,408,434 · 1995 VOLTAGE CONTROLLED RING OSCILLATOR HAVING DIFFERENTIAL AMPLIFIER STAGESUS 5,298,870 · 1994 DIGITAL SIGNAL PROCESSINGUS 5,202,847 · 1993 DIGITAL SIGNAL INVERSION EMPLOYING CROSS-OVER SWITCHUS 5,162,796 · 1992 MICROCOMPUTER WITH INTERPROCESS COMMUNICATIONUS 4,692,861 · 1987 METHOD OF FABRICATING SELF-ALIGNED MOS DEVICES AND INDEPENDENTLY FORMED GATE DIELECTRICS AND INSULATING LAYERSUS 4,397,077 · 1983

Cites (13)

VIRTUAL SINGLE MACHINE WITH MESSAGE-LIKE HARDWARE INTERRUPTS AND PROCESSOR EXCEPTIONSUS 4,835,685 · 1989 MICROCOMPUTERUS 4,819,151 · 1989 METHOD OF INTER-PROCESS COMMUNICATION IN A DISTRIBUTED DATA PROCESSING SYSTEMUS 4,694,396 · 1987 ALTERNATE LINE INTERPOLATORUS 4,571,632 · 1986 A PLURALITY OF PROCESSORS SHARING THE MEMORY, THE ARITHMETIC LOGIC UNIT AND CONTROL CIRCUITRY ALL ON A SINGLE SEMICONDUCTOR CHIPUS 4,491,907 · 1985 PSUEDO-MICROPROGRAMMING IN SINGLE-CHIP MICROPROCESSOR WITH ALTERNATE IR LOADING FROM INTERNAL OR EXTERNAL PROGRAM MEMORIESUS 4,450,519 · 1984 ARRAY PROCESSORUS 4,270,170 · 1981 CONCURRENT TASK AND INSTRUCTION PROCESSOR AND METHODUS 4,229,790 · 1980 DISTRIBUTED DATA PROCESSING SYSTEMUS 4,145,739 · 1979 Patent US 4,084,228US 4,084,228 Patent US 4,130,865US 4,130,865 Patent US 4,394,725US 4,394,725 Patent US 4,533,992US 4,533,992

Cited by (10)

PROTOCOL AND METHOD FOR MULTI-CHASSIS CONFIGURABLE TIME SYNCHRONIZATIONUS 7,721,001 · 2010 EXPLOITING UNUSED CONFIGURATION MEMORY CELLSUS 7,711,933 · 2010 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICEUS 7,336,535 · 2008 EXPLOITING UNUSED CONFIGURATION MEMORY CELLSUS 7,219,325 · 2007 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE

Related research

High-Density Dynamic Random Access Memory Circuit DesignSemantic Scholar A 40nm 60.64TOPS/W ECC-Capable Compute-in-Memory/Digital 2.25MB/768KB RRAM/SRAM System with Embedded Cortex M3 Microprocessor for Edge Recommendation SystemsSemantic Scholar A Fully Integrated Reprogrammable CMOS-RRAM Compute-in-Memory Coprocessor for Neuromorphic ApplicationsSemantic Scholar Resistive Memory‐Based In‐Memory Computing: From Device and Large‐Scale Integration System PerspectivesSemantic Scholar Monolithically Integrated RRAM- and CMOS-Based In-Memory Computing Optimizations for Efficient Deep LearningSemantic Scholar

Full text

Google Patents