DIGITAL CIRCUIT DESIGN ASSIST SYSTEM FOR DESIGNING HARDWARE UNITS AND SOFTWARE UNITS IN A DESIRED DIGITAL CIRCUIT, AND METHOD THEREOF

Patent №

US 5,493,507

Granted

1996-02-20

Filed 1993

Owner

PFU LIMITED

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

08136203

A digital circuit design assist system is directed to provide a system which independently verifies hardware divided into a plurality of units or the hardware and software, and reduces the design time. The system includes a functional model storage unit 1 for storing functional models in order to design hardware for a desired digital circuit including the hardware alone or the hardware and firmware, and functionally expressing the digital circuit by a hardware description language through a text editor 15 by coding input. Logic synthesis system 2 is provided for converting the functional model to a structural model, structurally expressed by the hardware description language. Structural model storage unit 3 is provided for storing the structural model, and a language model library storage unit 4 is provided for storing language models each expressing each of a plurality of components constituting the hardware by the hardware description language. Hardware description language simulation system 5 is provided for verifying correctness of the logic of the hardware from the functional model, the structural model and the language model.

AI hardwareG01R 31/318357G01R 31/318307G01R 31/318364G06F 11/261G06F 30/30G06F 30/323G06F 30/33G06F 30/3308

AI classification

AI hardware0.99
Natural language0.11
Knowledge representation0.07
Machine learning0.02
Vision0.02
Planning0.00
Speech0.00
Evolutionary computation0.00

Ownership

PFU LIMITED

assignment · 68210074

Assignors

SHINDE, HIROTAKE, SUGINO, KAZUHITO, NAKAMICHI, KOJI, MATSUBARA, NOZOMU, HIKONO, ATSUHI

On an employer assignment, the assignors are typically the inventors.

From the same owner

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