METHODS AND APPARATUSES TO PERFORM HIGH VOLTAGE ELECTRICAL RULE CHECK OF MOS CIRCUIT DESIGN

A two part high voltage check program creates a circuit simulator input file, analyzes the resulting circuit simulator output file for design rule violations, and produces a user report of all violations. The user creates a transistor file which indicates which blocks are to be checked, and optionally specifies individual transistors within the block for checking. The user creates a rule file including rule definitions for the various different types of transistors in the design. The first part generates a print file for input to a circuit simulator. The second part reads the print file, the rule file, and the simulator output file. The second part produces a transistor linked list which is linked to the rule linked list. The second part reads the simulator output file line by line and performs the high voltage electrical rule checks for each transistor for each time step. The second part produces a violation linked lists for each transistor for each violation type. Only tine points representing the beginning or end of a violation sequence are added to the violation linked lists. The second part maintains variables corresponding to each violation type which indicate the maximum violation amount and time for each transistor. The second part produces reports for each transistor's violations, and deallocates the violation linked lists after each transistor has been fully checked. The high voltage rule check program uses dynamic linked list data structures to effectively minimize DRAM utilization at run time.