MEMORY WRITER WITH DEFLECTIVE MEMORY -CELL HANDLING CAPABILITY

A memory writer has the capability to modify the machine code according to the defective memory-cell locations, such that the modified code functionally bypasses all defective memory-cell addresses upon program execution. The machine code is modified without re-compilation of the microprogram, instead, it is modified by inserting jump machine-code instructions directly between instruction steps, and to insert dummy bytes between adjacent memory space allocations for symbols definition. The machine code is further modified to take into account of the effect of the insertion of additional codes on the instruction within the machine code that involve the address referencing. The modified machine code, when written to the partially defective memory, performs identical routines while bypassing all defective memory-cell addresses. The present invention is useful for writing a microprogram in non-volatile memories, such as EPROM, EEPROM or Flash/EEPROM. It is also useful in loading a microprogram in volatile memories like SRAM, DRAM, etc.