TESTING METHOD AND APPARATUS ASSURING SEMICONDUCTOR DEVICE QUALITY AND RELIABILITY

A method for assuring quality and reliability of semiconductor integrated circuit devices, fabricated by a series of documented process steps, comprising first, electrically testing the devices outside their specified operating voltage range, yet within the capabilities of the structures produced by the process steps, thereby generating raw electrical test data; second, comparing the test data to values expected from the design of the devices, thereby providing non-electrical characterization of the devices to verify compositional and structural features; and third, correlating the features with the documented process steps to find deviations therefrom, as well as structural defects, thereby identifying outlier devices. After eliminating the outlier devices, the accepted devices do no longer have to undergo the traditional burn-in process.