COMPREHENSIVE REDUNDANT LOAD ELIMINATION FOR ARCHITECTURES SUPPORTING CONTROL AND DATA SPECULATION

Patent №

US 6,202,204

Granted

2001-03-13

Filed 1998

Owner

INTEL CORPORATION

Lab

AI components

2

kr · hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

09038755

In one implementation of the invention, a computer implemented method used in compiling a program includes identifying a covering load, which may be one of a set of covering loads, and a redundant load. The covering load and the redundant load have a first and second load type, respectively. The first and the second load type each may be one of a group of load types including a regular load and at least one speculative-type load. In one implementation, the group of load types includes at least one check-type load. One implementation of the invention is in a machine readable medium.

Knowledge representationAI hardwareG06F 8/433G06F 8/443G06F 8/445G06F 9/30181G06F 9/383G06F 9/384G06F 9/3842

AI classification

AI hardware0.99
Knowledge representation0.88
Vision0.02
Natural language0.00
Evolutionary computation0.00
Planning0.00
Machine learning0.00
Speech0.00

Ownership

INTEL CORPORATION

assignment · 90390754

Assignors

WU, YOUFENG, LEE, YONG-FONG

On an employer assignment, the assignors are typically the inventors.

From the same owner

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