APPARATUS AND METHOD FOR ANALYZING FUNCTIONAL FAILURES IN INTEGRATED CIRCUITS

Patent №

US 6,549,022

Granted

2003-04-15

Filed 2000

Owner

SANDIA NATIONAL LABORATORIES

+4 more

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

09586505

An apparatus and method are presented for identifying and mapping functional failures in an integrated circuit (IC) due to timing errors therein based on the generation of functional failures in the IC. This is done by providing a set of input test vectors to the IC and adjusting one or more: of the IC voltage, temperature or clock frequency; the rate at which the test vectors are provided to the IC; or the power level of a focused laser beam used to probe the IC and produce localized heating which changes the incidence of the functional failures in the IC which can be sensed for locating the IC circuit elements responsible for the functional failures. The present invention has applications for optimizing the design and fabrication of ICs, for failure analysis, and for qualification or validation testing of ICs.

AI classification

AI hardware1.00
Machine learning0.00
Vision0.00
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Ownership

SANDIA NATIONAL LABORATORIES

assignment · 111260273

SANDIA CORPORATION

correct · 126500703

ADVANCED MICRO DEVICES, INC.

assignment · 130370928

UNIVERSITY OF NEW MEXICO

assignment · 162740974

SCIENCE & TECHNOLOGY CORPORATION @ UNM

assignment · 162740987

Assignors

COLE, EDWARD I., JR., TANGYUNYONG, PAIBOON, HAWKINS, CHARLES F., BRUCE, MICHAEL R., BRUCE, VICTORIA J., RING, ROSALINDA M., COLE, JR., EDWARD I., TRANGYUNYONG, PAIBOON, HAWKINS, CHARLES F., BRUCE, MICHAEL R., BRUCE, VICTORIA J., RING, ROSALINDA M.

On an employer assignment, the assignors are typically the inventors.

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