HIERARCHICAL LAYOUT METHOD FOR INTEGRATED CIRCUITS

Patent №

US 6,574,779

Granted

2003-06-03

Filed 2001

Owner

INTERNATIONAL BUSINESS MACHINES CORPORATION

AI components

2

planning · hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

09833479

A method for hierarchical layout of an electronic design using an electronic computer aided design system, wherein the method includes generating a parameterized pattern library and using an existing netlist and analyze in a pattern recognizer, from which a list of associations between the pattern library and the netlist is created. Renesting then occurs wherein the netlist using the list of associations is used for generating a hierarchical layout of the electronic components in the design.

AI classification

Planning0.95
AI hardware0.70
Machine learning0.07
Evolutionary computation0.03
Natural language0.02
Knowledge representation0.01
Vision0.00
Speech0.00

Ownership

INTERNATIONAL BUSINESS MACHINES CORPORATION

assignment · 117480192

Assignors

ALLEN, ROBERT J., COHN, JOHN M., LOVEJOY, STEVE G.

On an employer assignment, the assignors are typically the inventors.

From the same owner

© 2026 NYSGPT2525 LLC