INTEGRATED VERIFICATION AND MANUFACTURABILITY TOOL

Patent №

US 7,017,141

Granted

2006-03-21

Filed 2002

Owner

MENTOR GRAPHICS CORPORATION

+1 more

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

10112223

An integrated verification and manufacturability tool provides more efficient verification of integrated device designs than verification using several different verification tools. The integrated verification and manufacturability includes a hierarchical database to store shared design data accessed by multiple verification tool components (e.g., layout versus schematic, design rule check, optical process correction, phase shift mask assignment and machine language conversion). The hierarchical database includes representations of one or more additional, or intermediate layer structures that are created and used by the verification tool components for operations performed on the design being verified. Use of a single hierarchical database having shared data for access and use by multiple verification components streamlines the verification process, which provides an improved verification tool.

AI hardwareG06F 30/398G03F 1/26

AI classification

AI hardware0.96
Knowledge representation0.30
Natural language0.03
Machine learning0.01
Planning0.00
Speech0.00
Evolutionary computation0.00
Vision0.00

Ownership

MENTOR GRAPHICS CORPORATION

assignment · 606730436

SIEMENS INDUSTRY SOFTWARE INC.

merger · 606730635

Assignors

ANDERSON, LEIGH C., COBB, NICOLAS B., GRODD, LAURENCE W., SAHOURIA, EMILE Y., YOU, SIQIONG

On an employer assignment, the assignors are typically the inventors.

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