HARDWARE/SOFTWARE CO-DEBUGGING IN A HARDWARE DESCRIPTION LANGUAGE

Patent №

US 7,240,303

Granted

2007-07-03

Filed 2003

Owner

SYNPLICITY, INC.

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

10456768

Techniques and systems for analysis, diagnosis and debugging fabricated hardware designs at a Hardware Description Language (HDL) level are described. Although the hardware designs (which were designed in HDL) have been fabricated in integrated circuit products with limited input/output pins, the techniques and systems enable the hardware designs within the integrated circuit products to be comprehensively analyzed, diagnosed, and debugged at the HDL level at speed. The ability to debug hardware designs at the HDL level facilitates correction or adjustment of the HDL description of the hardware designs.

AI hardwareG06F 30/33G01R 31/31705G01R 31/318364G06F 11/3644

AI classification

AI hardware1.00
Knowledge representation0.46
Evolutionary computation0.41
Planning0.10
Machine learning0.07
Natural language0.01
Vision0.00
Speech0.00

Ownership

SYNPLICITY, INC.

assignment · 145740366

Assignors

SCHUBERT, NILS ENDRIC, MCELVAIN, KENNETH S., BEARDSLEE, JOHN MARK, LAROUCHE, MARIO

On an employer assignment, the assignors are typically the inventors.

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