HARDWARE DEBUGGING IN A HARDWARE DESCRIPTION LANGUAGE

Patent №

US 6,904,577

Granted

2005-06-07

Filed 2003

Owner

Lab

AI components

2

evo · hardware

Assignment

None on record

Dataset

AIPD

2023_r1 edition

Application

10406732

Techniques and systems for analysis, diagnosis and debugging fabricated hardware designs at a Hardware Description Language (HDL) level are described. Although the hardware designs (which were designed in HDL) have been fabricated in integrated circuit products with limited input/output pins, the techniques and systems enable the hardware designs within the integrated circuit products to be comprehensively analyzed, diagnosed, and debugged at the HDL level at speed. The ability to debug hardware designs at the HDL level facilitates correction or adjustment of the HDL description of the hardware designs.

Evolutionary computationAI hardwareG01R 31/318357G01R 31/318364G06F 11/26G06F 30/33

AI classification

AI hardware1.00
Evolutionary computation0.57
Knowledge representation0.45
Planning0.20
Machine learning0.10
Natural language0.01
Vision0.00
Speech0.00
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