ADVANCED EXECUTION OF EXTENDED FLOATING-POINT ADD OPERATIONS IN A NARROW DATAFLOW

Patent №

US 7,373,369

Granted

2008-05-13

Filed 2004

Owner

INTERNATIONAL BUSINESS MACHINES CORPORATION

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

10861151

A method and system for performing floating point additive arithmetic operations of long operands in a narrow dataflow. The operands include first and second floating point numbers having first and second mantissas, respectively, the second operand greater than the first operand. The mantissas are both separated into a low portion and a high portion, the high portions are loaded into N-bit operand registers. The high portion of the first mantissa is aligned with respect to the high portion of the second mantissa, the high portions are then moved into 2N-bit registers. The low portion of the first mantissa is aligned in accordance with the alignment of the first mantissa high portion. The low portions of both mantissas are then concatenated into the registers, the first mantissa concatenated using a hold-function circuit. A 2N-bit-wide adder performs the additive arithmetic operation on the concatenated mantissas.

AI hardwareG06F 7/485G06F 2207/3896

AI classification

AI hardware0.88
Evolutionary computation0.01
Natural language0.00
Vision0.00
Machine learning0.00
Speech0.00
Planning0.00
Knowledge representation0.00

Ownership

INTERNATIONAL BUSINESS MACHINES CORPORATION

assignment · 156080151

Assignors

GERWIG, GUENTER, KROENER, KLAUS MICHAEL

On an employer assignment, the assignors are typically the inventors.

From the same owner

© 2026 NYSGPT2525 LLC