Patent №
US 7,464,363
Granted
2008-12-09
Filed 2006
Owner
FUJITSU LIMITED
Lab
—
AI components
1
planning
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
11504638
A verification support device supports logic verification of a design object corresponding to modified sequence diagrams obtained by modifying sequence diagrams expressing processes of a design object in a chronological order. A diagram extracting unit extracts the modified sequence diagrams. A modified process detecting unit detects modified processes by comparing the sequence diagrams before modification and the sequence diagrams after modification. Based on the modified processes, an applicability determining unit determines whether test benches used for a regression test of the design object of the sequence diagrams before modification is applicable to a regression test of the design object of the sequence diagrams after modification. A test bench output unit outputs test benches based on a result of determination by the applicability determining unit.
AI classification
Ownership
FUJITSU LIMITED
assignment · 182020808
Assignors
SASAKI, TAKAYUKI, ABE, KENJI
On an employer assignment, the assignors are typically the inventors.