ASYNCHRONOUS MULTIPLE-ORDER ISSUE SYSTEM ARCHITECTURE

Patent №

US 7,698,535

Granted

2010-04-13

Filed 2003

Owner

FULCRUM MICROSYSTEMS INC.

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

10667152

An asynchronous circuit is described for processing units of data having a program order associated therewith. The circuit includes an N-way-issue resource comprising N parallel pipelines. Each pipeline is operable to transmit a subset of the units of data in a first-in-first-out manner. The asynchronous circuit is operable to sequentially control transmission of the units of data in the pipelines such that the program order is maintained.

AI hardwareG06F 9/3836G06F 9/3851G06F 9/3885

AI classification

AI hardware1.00
Vision0.02
Natural language0.00
Knowledge representation0.00
Evolutionary computation0.00
Speech0.00
Planning0.00
Machine learning0.00

Ownership

FULCRUM MICROSYSTEMS INC.

assignment · 149060073

Assignors

LINES, ANDREW, SOUTHWORTH, ROBERT, CUMMINGS, URI

On an employer assignment, the assignors are typically the inventors.

© 2026 NYSGPT2525 LLC