EXCEPTION PROCESSING IN ASYNCHRONOUS PROCESSOR

Patent №

US 6,301,655

Granted

2001-10-09

Filed 1998

Owner

CALIFORNIA INSTITUTE OF TECHNOLOGY

Lab

AI components

2

planning · hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

09153756

Exception handling systems and techniques for handling exceptions and sequencing conflicts in an asynchronous processor. Two designated queues are used to respectively keep program counter values of instructions and the assignments of the execution units for executing the instructions according to the program order. An asynchronous circuit is coupled between the program counter unit and the write-back unit of the processor to provide asynchronous communications.

PlanningAI hardwareG06F 9/3856G06F 9/30076G06F 9/3836G06F 9/3858G06F 9/3861

AI classification

Planning0.65
AI hardware0.58
Natural language0.00
Evolutionary computation0.00
Speech0.00
Machine learning0.00
Knowledge representation0.00
Vision0.00

Ownership

CALIFORNIA INSTITUTE OF TECHNOLOGY

assignment · 96920073

Assignors

MANOHAR, RAJIT, MARTIN, ALAIN, NYSTROM, MIKA

On an employer assignment, the assignors are typically the inventors.

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