SYSTEMS AND METHODS FOR TEST TIME OUTLIER DETECTION AND CORRECTION IN INTEGRATED CIRCUIT TESTING

Patent №

US 7,969,174

Granted

2011-06-28

Filed 2009

Owner

OPTIMALTEST LTD.

Lab

AI components

2

planning · hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

12418024

Methods and systems for semiconductor testing are disclosed. In one embodiment, devices which are testing too slowly are prevented from completing testing, thereby allowing untested devices to begin testing sooner.

PlanningAI hardwareG01R 31/2601G01R 31/2894G01R 31/31707G01R 31/3172G01R 31/318511

AI classification

Planning0.97
AI hardware0.81
Natural language0.01
Machine learning0.01
Knowledge representation0.00
Evolutionary computation0.00
Speech0.00
Vision0.00

Ownership

OPTIMALTEST LTD.

assignment · 560240281

Assignors

BALOG, GIL, LINDE, REED, GOLAN, AVI

On an employer assignment, the assignors are typically the inventors.

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