METHOD, SYSTEM, AND COMPUTER PROGRAM PRODUCT FOR HANDLING ERRORS IN A CACHE WITHOUT PROCESSOR CORE RECOVERY

Patent №

US 7,987,384

Granted

2011-07-26

Filed 2008

Owner

INTERNATIONAL BUSINESS MACHINES CORPORATION

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

12029516

A method for handling errors in a cache memory without processor core recovery includes receiving a fetch request for data from a processor and simultaneously transmitting fetched data and a parity matching the parity of the fetched data to the processor. The fetched data is received from a higher-level cache into a low level cache of the processor. Upon determining that the fetched data failed an error check indicating that the fetched data is corrupted, the method includes requesting an execution pipeline to discontinue processing and flush its contents, and initiating a clean up sequence, which includes sending an invalidation request to the low level cache causing the low level cache to remove lines associated with the corrupted data, and requesting the execution pipeline to restart. The execution pipeline accesses a copy of the requested data from a higher-level storage location.

AI hardwareG06F 12/0804G06F 11/1064G06F 12/0855G06F 12/0897

AI classification

AI hardware0.96
Planning0.00
Vision0.00
Natural language0.00
Knowledge representation0.00
Machine learning0.00
Evolutionary computation0.00
Speech0.00

Ownership

INTERNATIONAL BUSINESS MACHINES CORPORATION

assignment · 204940688

Assignors

JACOBI, CHRISTIAN, PFLANZ, MATTHIAS, SHUM, CHUNG-LUNG KEVIN, TAST, HANS-WERNER, TSAI, AARON

On an employer assignment, the assignors are typically the inventors.

From the same owner

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