Patent №
US 8,117,397
Granted
2012-02-14
Filed 2008
Owner
INTERNATIONAL BUSINESS MACHINES CORPORATION
Lab
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
12335809
A cache memory includes a cache array including a plurality of congruence classes each containing a plurality of cache lines, where each cache line belongs to one of multiple classes which include at least a first class and a second class. The cache memory also includes a cache directory of the cache array that indicates class membership. The cache memory further includes a cache controller that selects a victim cache line for eviction from a congruence class. If the congruence class contains a cache line belonging to the second class, the cache controller preferentially selects as the victim cache line a cache line of the congruence class belonging to the second class based upon access order. If the congruence class contains no cache line belonging to the second class, the cache controller selects as the victim cache line a cache line belonging to the first class based upon access order.
AI classification
Ownership
INTERNATIONAL BUSINESS MACHINES CORPORATION
assignment · 224220849
Assignors
GUTHRIE, GUY L., JEREMIAH, THOMAS L., MCNEIL, WILLIAM L., PATEL, PIYUSH C., STARKE, WILLIAM J., STUECHELI, JEFFREY A.
On an employer assignment, the assignors are typically the inventors.