Patent №
US 9,367,348
Granted
2016-06-14
Filed 2013
Owner
INTERNATIONAL BUSINESS MACHINES CORPORATION
Lab
AI components
3
kr · planning · hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
13967853
A processing unit includes a processor core and a cache memory. Entries in the cache memory are grouped in multiple congruence classes. The cache memory includes tracking logic that tracks a transaction footprint including cache line(s) accessed by transactional memory access request(s) of a memory transaction. The cache memory, responsive to receiving a memory access request that specifies a target cache line having a target address that maps to a congruence class, forms a working set of ways in the congruence class containing cache line(s) within the transaction footprint and updates a replacement order of the cache lines in the congruence class. Based on membership of the at least one cache line in the working set, the update promotes at least one cache line that is not the target cache line to a replacement order position in which the at least one cache line is less likely to be replaced.
AI classification
Ownership
INTERNATIONAL BUSINESS MACHINES CORPORATION
assignment · 310190532
Assignors
GHAI, SANJEEV, GUTHRIE, GUY L., JACKSON, JONATHAN R., WILLIAMS, DEREK E.
On an employer assignment, the assignors are typically the inventors.