SYSTEM AND METHOD TO INVALIDATE OBSOLETE ADDRESS TRANSLATIONS

Patent №

US 8,412,911

Granted

2013-04-02

Filed 2009

Owner

SUN MICROSYSTEMS, INC.

Lab

AI components

2

planning · hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

12493923

A system and method for invalidating obsolete virtual/real address to physical address translations may employ translation lookaside buffers to cache translations. TLB entries may be invalidated in response to changes in the virtual memory space, and thus may need to be demapped. A non-cacheable unit (NCU) residing on a processor may be configured to receive and manage a global TLB demap request from a thread executing on a core residing on the processor. The NCU may send the request to local cores and/or to NCUs of external processors in a multiprocessor system using a hardware instruction to broadcast to all cores and/or processors or to multicast to designated cores and/or processors. The NCU may track completion of the demap operation across the cores and/or processors using one or more counters, and may send an acknowledgement to the initiator of the demap request when the global demap request has been satisfied.

PlanningAI hardwareG06F 9/3851G06F 9/3885G06F 12/1027G06F 2212/683

AI classification

AI hardware1.00
Planning0.59
Vision0.03
Natural language0.00
Knowledge representation0.00
Evolutionary computation0.00
Machine learning0.00
Speech0.00

Ownership

SUN MICROSYSTEMS, INC.

assignment · 228880765

Assignors

GROHOSKI, GREGORY F., JORDAN, PAUL J., LUTTRELL, MARK A., SAMOAIL, ZEID HARTUON

On an employer assignment, the assignors are typically the inventors.

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