FLASH MEMORY CONTROLLER

A Flash memory controller is coupled to a first Flash memory package through a first Flash memory interface and to a second Flash memory package through the first Flash memory interface. The Flash memory controller is designed to receive a first instruction relating to the first Flash memory package and to perform a first process depending on the first instruction. The Flash memory controller is further designed to receive a second instruction relating to the second Flash memory package and to perform a second process depending on the second instruction. The Flash memory controller is further adapted for splitting the first process into at least two first sub-steps and for splitting the second process into at least two second sub-steps. The Flash memory controller is further adapted for executing the first and second sub-steps, and for interleaving execution of first and second sub-steps.