Patent №
US 9,268,683
Granted
2016-02-23
Filed 2013
Owner
KANDOU BUS SA
+1 more
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
13844032
A memory circuit, such as an embedded DRAM array, stores information as groups of bits or data using information coding in storage and retrieval data, instead of each bit being stored separately. Write data words can be mapped to storage format words that are stored and defined by a Hadamard matrix. The storage format word is stored as charge levels in an addressable memory location. For retrieving stored data, charge levels are read from the storage cells and interpreted to a valid storage format word. Hadamard code maximal likelihood decoding can be used to derive a read data word corresponding to a previously written write data word. The write data word is then output as the result of a read of the selected addressable location, or a portion thereof. The mapping can be two or more Hadamard matrix mappings concatenated for each of a plurality of storage format words.
AI classification
Ownership
KANDOU BUS SA
assignment · 304190544
KANDOU LABS, S.A.
assignment · 304280707
Assignors
CRONIE, HARM, SHOKROLLAHI, AMIN
On an employer assignment, the assignors are typically the inventors.