DYNAMIC CACHE MEMORY MANAGEMENT WITH TRANSLATION LOOKASIDE BUFFER PROTECTION

Patent №

US 9,727,484

Granted

2017-08-08

Filed 2016

Owner

INTERNATIONAL BUSINESS MACHINES CORPORATION

AI components

2

planning · hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

15010691

A computer-implemented method for protecting a translation lookaside buffer (TLB) from TLB pollution includes receiving, via a processor, a virtual address for a data portion, determining, via the processor, whether the virtual address has a classification of memory cache transiency, creating, via the processor, a TLB entry in a first TLB, wherein the TLB entry omits a most recently used (MRU) classification, and installing the TLB entry in a next available LRU position.

PlanningAI hardwareG06F 12/1045G06F 12/0815G06F 12/123G06F 12/0897G06F 12/126G06F 2212/1044G06F 2212/50G06F 2212/502+3 more

AI classification

AI hardware0.98
Planning0.87
Natural language0.02
Knowledge representation0.01
Machine learning0.00
Speech0.00
Evolutionary computation0.00
Vision0.00

Ownership

INTERNATIONAL BUSINESS MACHINES CORPORATION

assignment · 381400215

Assignors

BRADBURY, JONATHAN D., GSCHWIND, MICHAEL KARL, JACOBI, CHRISTIAN, SAPORITO, ANTHONY, SHUM, CHUNG-LUNG KEVIN, SLEGEL, TIMOTHY J.

On an employer assignment, the assignors are typically the inventors.

From the same owner

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