IMPLEMENTING OUT OF ORDER PROCESSOR INSTRUCTION ISSUE QUEUE

Patent №

US 9,740,495

Granted

2017-08-22

Filed 2015

Owner

INTERNATIONAL BUSINESS MACHINES CORPORATION

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

14628188

A method and apparatus are provided for implementing an enhanced out of order processor instruction issue queue in a computer system. Instructions are selectively accepted into an instruction issue queue and ages are assigned to the accepted queue entry instructions using a queue counter. The queue entry instructions are issued based upon resources being ready and ages of the instructions. Ages of the queue entry instructions and the queue counter are selectively decremented, responsive to issuing instructions.

AI hardwareG06F 9/3856G06F 9/3836

AI classification

AI hardware1.00
Natural language0.01
Planning0.00
Knowledge representation0.00
Machine learning0.00
Evolutionary computation0.00
Speech0.00
Vision0.00

Ownership

INTERNATIONAL BUSINESS MACHINES CORPORATION

assignment · 350000363

Assignors

GUO, CHEN, HO, JOHN, SALIBA, ZIAD, SHOKOUHBAKHSH, ARASH, TSAI, CHENG-FU F.

On an employer assignment, the assignors are typically the inventors.

From the same owner

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