Patent №
US 4,335,459
Granted
—
Owner
—
Lab
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AI components
1
evo
Assignment
None on record
Dataset
AIPD
2023_r1 edition
Application
06151690
The production yield and reliability of random access integrated circuit memory chips are greatly increased by providing a memory capacity greater than the nominal capacity of the chip and providing error correction circuitry on the chip. The internal organization of the memory chip must be on a multibit word basis to provide for storage of data and error correction bits. If the external organization of the chips is for input and output of fewer data bits than used by the error correction code, the data is read into the memory using a read-modify-write operation, and data is read out of the memory chip by reading a full word through the error correction circuit and selecting the output bits from the corrected word. In a multiple chip memory system each memory chip includes its own on-chip error correction. Additionally, conventional external error correction may be provided. The error correction may be incorporated into a single chip microprocessor in order to increase the yield and reliability of the microprocessor.