LOGIC PATH LENGTH REDUCTION USING BOOLEAN MINIMIZATION

Patent №

US 4,916,627

Granted

1990-04-10

Filed 1987

Owner

INTERNATIONAL BUSINESS MACHINES CORPORATION, A CORP. OF NEW YORK

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

07127323

An apparatus and method for reducing the number of gate levels of a logic network. The gates of the network are levelized in a forward and backward direction to determine the worst path length of the network. A gate in the worst path is selected in accordance with a specified scoring function. A local Boolean compression is applied to the selected gate, thereby reducing the number of gate levels of the logic network.

AI classification

AI hardware0.91
Machine learning0.13
Vision0.04
Planning0.01
Knowledge representation0.01
Natural language0.00
Speech0.00
Evolutionary computation0.00

Ownership

INTERNATIONAL BUSINESS MACHINES CORPORATION, A CORP. OF NEW YORK

assignment · 48420823

Assignors

HATHAWAY, DAVID J.

On an employer assignment, the assignors are typically the inventors.

From the same owner

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