REDUCED INSTRUCTION SET COMPUTER (RISC) TYPE MICROPROCESSOR EXECUTING INSTRUCTION FUNCTIONS INDICATING DATA LOCATION FOR ARITHMETIC OPERATIONS AND RESULT LOCATION
Patent №
US 5,041,968
Granted
1991-08-20
Filed 1990
Owner
NEC COPRORATION
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
07535300
A reduced instruction set type microprocessor which reduces loss of central processing unit (CPU) time. A circuit is provided to identify and keep track of whether an arithmetic instruction requires operands contained in internal registers or in main memory. First and second execution stage circuits are provided for executing the first and second instruction executing functions, respectively. The first execution stage circuit performs address calculation if the instruction involves main memory. The second execution stage circuit selects the appropriate operands and performs the arithmetic operation.
AI classification
Ownership
NEC COPRORATION
assignment · 226590293
Assignors
YAMAGUCHI, YOSHIKO
On an employer assignment, the assignors are typically the inventors.