MEMORY MAPPING METHOD AND APPARATUS TO FOLD SPARSELY POPULATED STRUCTURES INTO DENSELY POPULATED MEMORY COLUMNS OR ROWS BY TRANSPOSING X AND Y ADDRESS PORTIONS AND PROGRAMMABLE GATE ARRAY APPLICATIONS THEREOF
Patent №
US 5,692,147
Granted
1997-11-25
Filed 1995
Owner
INTERNATIONAL BUSINESS MACHINES CORPORATION
Lab
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
08488314
A field programmable gate array has a plurality of programmable resources addressable per respective x and y dimensions of an x,y two dimensional array. A memory device provides a plurality of memory units that store configuration data for configuring associated programmable resources of the field programmable gate array. A controller addresses the memory device with an N-bit address for retrieving given configuration data. An address decoder and sequencer divides the N-bit address into first, second, and third portions and employs the first and third portions interchangeably, in accordance with the second portion, for addressing respective x and y dimensions of the plurality of programmable resources for selecting an associated programmable resource to be configured in accordance with the retrieved configuration data.
AI classification
Ownership
INTERNATIONAL BUSINESS MACHINES CORPORATION
assignment · 76250918
Assignors
LARSEN, WENDELL R., KEYSER, FRANK R., WORTH, BRIAN A.
On an employer assignment, the assignors are typically the inventors.