Patent №
US 6,480,985
Granted
2002-11-12
Filed 1998
Owner
MENTOR GRAPHICS CORPORATION
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
09140632
Briefly, the present invention analyzes high-level IC description language code, such as VHDL and Verilog, of an integrated circuit (IC) design and generates graphical representations of the IC design based on the code analyzed. The graphical representations can include one or more of the following: 1) a block diagram of functional blocks; 2) a state diagram of a state machine; and 3) a flow chart of an operation al flow of the IC. Graphical representations provide more understandable representations of circuits described by the high-level IC description language code than the code itself.
AI classification
Ownership
MENTOR GRAPHICS CORPORATION
assignment · 95240725
Assignors
REYNOLDS, MICHAEL J., TREDINNICK, JACOB L., NAJM, SHAHRAM, GILFORD, MICHAEL E.J., WALKER, GORDON N., DANE, MARK W.P.
On an employer assignment, the assignors are typically the inventors.