METHOD FOR VERIFYING THE DESIGN OF A MICROPROCESSOR

A method for verifying an integrated circuit design includes generating verification coverage information by simulating the operation of the integrated circuit. The verification coverage information is then analyzed to determine a set of missing coverage states. A set of verification directives based on the set of missing coverage states is composed and a set of test cases is generated, based on the verification directives, to simulate the missing coverage states. Analyzing the verification coverage information may include decomposing the verification coverage information into a set of basic coverage tasks (BCTs), wherein each BCT is a generic representation of a corresponding task. Decomposing the verification coverage information into a set of BCTs may comprise decomposing the verification coverage information into a set of covered BCTs and a set of BCT holes, wherein the covered BCTs represent verification states covered by the simulation and BCT holes represent verification states not covered.