SYSTEM AND METHOD FOR REDUCING WIRE DELAY OR CONGESTION DURING SYNTHESIS OF HARDWARE SOLVERS
Patent №
US 7,107,568
Granted
2006-09-12
Filed 2002
Owner
HEWLETT-PACKARD COMPANY
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
10266719
One embodiment of the invention is a method for producing a hardware solver for intermediate code comprising analyzing intermediate code for at least one instantiation that may cause at least one of wire delay and congestion in the solver, forming compensation for the at least one instantiation, and forming the solver in accordance with the compensation.
AI classification
AI hardware0.96
Speech0.00
Natural language0.00
Machine learning0.00
Vision0.00
Planning0.00
Knowledge representation0.00
Evolutionary computation0.00
Ownership
HEWLETT-PACKARD COMPANY
assignment · 134280821
Assignors
CRONQUIST, DARREN C.
On an employer assignment, the assignors are typically the inventors.
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